A high-speed, low-power divide-by-4 frequency divider implementedwith AlInAs/GaInAs HBT's |
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| Authors: | Farley CW Wang KC Chang MF Asbeck PM Nubling RB Sheng NH Pierson R Sullivan GJ |
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| Affiliation: | Rockwell Int. Sci. Center, Thousand Oaks, CA; |
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| Abstract: | The authors describe the first frequency divider demonstrated using AlInAs/GaInAs heterojunction bipolar transistors (HBTs). The divider (a static 1/4 divider circuit) operates up to a maximum frequency of 17.1 GHz, corresponding to a gate delay of 29 ps for a bilevel current-mode logic (CML) gate with a fan-out of 2, and a total power consumption of 67 mW (about 4.5 mW per equivalent NOR gate). These results demonstrate the potential of AlInAs/GaInAs HBTs for implementing low-power, high-speed integrated circuits |
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