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一种异构双核SoC的抗SEU加固方案
引用本文:黄琨,杨武,胡珂流,邓军,张涛.一种异构双核SoC的抗SEU加固方案[J].微电子学,2018,48(5):630-634.
作者姓名:黄琨  杨武  胡珂流  邓军  张涛
作者单位:中国电子科技集团公司 第二十四研究所, 重庆 400060,中国电子科技集团公司 第二十四研究所, 重庆 400060,中国电子科技集团公司 第二十四研究所, 重庆 400060,中国电子科技集团公司 第二十四研究所, 重庆 400060,中国电子科技集团公司 第二十四研究所, 重庆 400060
摘    要:异构双核SoC结构复杂,不同部分受到单粒子翻转(SEU)的影响程度不同。采用单一的技术对整个SoC进行加固,既浪费资源,效果也不好。根据不同部分受SEU影响的不同特点,选取SoC中受SEU影响最大的几个部分进行优化加固。使用自动三模冗余添加技术对处理器的寄存器堆和取指通道进行了加固,使用汉明码对存储器进行了加固,使用软硬协同的软件签名技术对CPU运行的程序进行了检测,不会对CPU的性能产生影响。仿真和物理实现的结果表明,相对于未加固的设计,该方案抗SEU能力提高了6倍,与全加固设计的抗SEU能力相当。该方案的面积消耗仅为34%,而全加固的为88%。

关 键 词:异构双核SoC    三模冗余    纠错码    软件签名
收稿时间:2017/11/22 0:00:00

An SEU Hardening Scheme of Heterogeneous Dual-Core SoC
HUANG Kun,YANG Wu,HU Keliu,DENG Jun and ZHANG Tao.An SEU Hardening Scheme of Heterogeneous Dual-Core SoC[J].Microelectronics,2018,48(5):630-634.
Authors:HUANG Kun  YANG Wu  HU Keliu  DENG Jun and ZHANG Tao
Affiliation:Sichuan Institute of Solid-State Circuits, China Electronics Technology Group Corp., Chongqing 400060, P. R. China,Sichuan Institute of Solid-State Circuits, China Electronics Technology Group Corp., Chongqing 400060, P. R. China,Sichuan Institute of Solid-State Circuits, China Electronics Technology Group Corp., Chongqing 400060, P. R. China,Sichuan Institute of Solid-State Circuits, China Electronics Technology Group Corp., Chongqing 400060, P. R. China and Sichuan Institute of Solid-State Circuits, China Electronics Technology Group Corp., Chongqing 400060, P. R. China
Abstract:The structure of heterogeneous dual-core SoC (HD SoC) is complex, and the influential level of single-event upsets (SEU) is distinct to different parts. The using of a single technology to strengthen the whole SoC, not only wastes resources, but also had undesirable effects. According to the different characteristics of different parts affected by SEU, some parts which were most affected by SEU were selected to be optimized and reinforced. First, the automatic triple modular redundancy (TMR) technique was adopted to harden the register heaps and the instruction-fetching channels of the processor. Second, the Hamming codes were used to harden the random access memory (RAM). Last, a software signature technique was applied to check the programs which were running on CPU. The scheme needed not to consume additional resources, and had little influence on the performance of CPU. Therefore, the scheme was easy to implement and low cost. The results of simulation and physics implementation showed that the anti-SEU capability of the proposed scheme was 6 times higher than that of the non-reinforced scheme, which was equivalent to the fully hardened scheme. The area consumption of this scheme was only 34%, while the fully reinforced scheme was 88%.
Keywords:heterogeneous dual-core SoC  TMR  EDAC  software signature
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