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| 基于FPGA的数字存储示波器的研究 | |
| 引用本文： | 陈政,孙伟波,王贵实.基于FPGA的数字存储示波器的研究[J].哈尔滨轴承,2009,30(1):55-57. |
| 作者姓名： | 陈政 孙伟波 王贵实 |
| 作者单位： | 1. 哈尔滨理工大学,黑龙江,哈尔滨,150080 2. 黑龙江省计量检定测试院,黑龙江,哈尔滨,150036 3. 哈尔滨轴承集团公司培训中心,黑龙江,哈尔滨,150036 |
| 摘 要： | 基于FPGA的数字存储示波器，以可编程逻辑器件ACEX1K30TC144-3和89c51单片机为核心，由通道输入调整、数据采集、数据处理、波形显示和操作面板等功能模块组成。系统中的数据采集及数据处理模块。采用了FPGA内制的RAMIP核，使系统的工作频率基本不受外围器件影响，经maxplusll延时分析，其内核频率可以达到40MHz以上。这对于数据处理速度和实时性要求比较高的应用领域具有重要的意义。 |
| 关 键 词： | 数字存储示波器:单片机:可编程逻辑器件 |
Research on digital storage oscilloscope based on FPGA |
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| Cheng Zheng,Sun Weibo,Wang Guishi.Research on digital storage oscilloscope based on FPGA[J].JOurnal of Harbin Bearing,2009,30(1):55-57. | |
| Authors: | Cheng Zheng Sun Weibo Wang Guishi |
| Affiliation: | 1.Harbin University of Science and Technology;Harbin 150080;China;2.Heilongjiang Provincial Institute of Measurement of Verification;Harbin 150036;3.Training Center;Harbin Bearing Group Corporation;China |
| Abstract: | The digital storage oscilloscope based on FPGA, with PLC ACEX1K30TC144-3 and 89c51 microprocessor as the core, consists of functional modules, such as input channel adjustment, data acquisition,data processing, waveform display and operation panel. In this system, the data acquisition and data processing modules which adopt RAMIP core build-in FPGA protect the service frequency of the system from peripheral device.The kernel frequency may be over 40MHZ by maxplus II time-delay analyzing,and it is significant for the influence caused by the speed of data processing and the application area which requires higher practicability. |
| Keywords: | digital storage oscilloscope microprocessor （PLC）program logic controller |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ | |