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ISTTOK real-time architecture
Affiliation:1. Institute of Plasma Physics, Chinese Academy of Science, Hefei 230031, China;2. CREATE, Università di Napoli Federico II, Università di Cassino and Università di Napoli Parthenope, Via Claudio 19, Napoli 80125, Italy;3. School of Nuclear Science and Technology, University of Science and Technology of China, Hefei 230026, China;4. ENEA UnitàTecnicaFusione, C.R. Frascati, Via E. Fermi 45, Frascati 00044, Roma, Italy;1. Department of Biochemistry, Molecular Biology, and Biophysics, University of Minnesota, Minneapolis, MN 55455, USA;2. Department of Chemistry, University of Minnesota, Minneapolis, MN 55455, USA
Abstract:The ISTTOK tokamak was upgraded with a plasma control system based on the Advanced Telecommunications Computing Architecture (ATCA) standard. This control system was designed to improve the discharge stability and to extend the operational space to the alternate plasma current (AC) discharges as part of the ISTTOK scientific program. In order to accomplish these objectives all ISTTOK diagnostics and actuators relevant for real-time operation were integrated in the control system.The control system was programmed in C++ over the Multi-threaded Application Real-Time executor (MARTe) which provides, among other features, a real-time scheduler, an interrupt handler, an intercommunications interface between code blocks and a clearly bounded interface with the external devices. As a complement to the MARTe framework, the BaseLib2 library provides the foundations for the data, code introspection and also a Hypertext Transfer Protocol (HTTP) server service.Taking advantage of the modular nature of MARTe, the algorithms of each diagnostic data processing, discharge timing, context switch, control and actuators output reference generation, run on well-defined blocks of code named Generic Application Module (GAM). This approach allows reusability of the code, simplified simulation, replacement or editing without changing the remaining GAMs.The ISTTOK control system GAMs run sequentially each 100 μs cycle on an Intel® Q8200 4-core processor running at 2.33 GHz located in the ATCA crate. Two boards (inside the ATCA crate) with 32 analog-to-digital converters (ADCs) were used for acquiring the diagnostics data. Each ADC operates at 2 Msample/s but (for real-time operation) the acquired data is decimated in real-time on the board's Field-programmable gate array (FPGA) to a frequency defined by the control cycle time.This paper presents the ISTTOK real-time architecture and the human–machine Interface (HMI) for simplified AC discharge programming.
Keywords:Nuclear fusion  Control and data acquisition  ATCA systems  MARTe framework  Real-time
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