Leakage current variation during two different modes of electrical stressing in undoped hydrogenated n-channel polysilicon thin film transistors (TFTs) |
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| Affiliation: | 1. Department of Electronics, Maharaja Agrasen College, University of Delhi, New Delhi 110096, India;2. Government College of Engineering & technology Safapora, Jammu & Kashmir, India;3. Department of Electronics Science, University of Delhi South Campus, New Delhi 110021, India;4. Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi, New Delhi 110078, India;1. EPIUnit—Institute of Public Health, University of Porto, Porto, Portugal;2. Division of Pediatric Nephrology, Integrated Pediatric Hospital, Centro Hospitalar São João, Porto, Portugal;3. Department of Pediatrics, Faculty of Medicine of University of Porto, Portugal;4. Division of Pediatric Cardiology, Integrated Pediatric Hospital, Centro Hospitalar São João, Porto, Portugal;5. Department of Clinical Epidemiology, Predictive Medicine and Public Health, Faculty of Medicine of University of Porto, Portugal;6. Division of Pediatric Nutrition, Integrated Pediatric Hospital, Centro Hospitalar São João, Porto, Portugal;7. Division of Pediatric Nephrology, Center for Pediatrics and Adolescent Medicine, University of Heidelberg, Heidelberg, Germany |
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| Abstract: | Leakage current evolution during two different modes of electrical stressing in hydrogenated-undoped n-channel polysilicon thin film transistors (TFTs) is studied in this work. On-state bias stress (high drain bias and positive gate bias) and off-state bias stress (high drain bias and negative gate bias) were performed in order to study the degradation of the leakage current. It is found that during off-state bias stress the gate oxide is more severely damaged than the SiO2-polySi interface. In contrast, during on-state bias stress, two different degradation mechanisms were detected which are analyzed. |
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