| 超前进位加法器研究 |
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| 引用本文： | 唐金艺. 超前进位加法器研究[J]. 现代计算机, 2008, 0(6) |
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| 作者姓名： | 唐金艺 |
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| 作者单位： | 海军计算技术研究所,北京100841 |
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| 摘 要： | 从硬件底层优化设计考虑,将串行加法转变为超前进位加法来提高底层的运算速度.通过设计超前进位加法将迭代关系去掉,使各变量运算彼此相对独立,避免进位传播.来降低门级层数,最终提高运算速度.
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| 关 键 词： | 全加器 超前进位加法器 串行加法器 硬件 |
Research on Carry Look-Ahead Adder |
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| TANG Jin-yi. Research on Carry Look-Ahead Adder[J]. Modem Computer, 2008, 0(6) |
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| Authors: | TANG Jin-yi |
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| Affiliation: | TANG Jin-yi (Computing Technology Institute of Navy,Beijing 100841) |
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| Abstract: | Introduces the optimization design method of changing the serial adder to the carry look-ahead adder to increase the computing speed of the low level hardware. By removing the iterative relation, carry look-ahead addition makes the variables independent from each other, avoids carry spread and reduces the gate level number. |
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| Keywords: | Full Adder Carry Look-Ahead Adder Serial Adder Hardware |
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