An analytical CMOS inverter delay model including channel-lengthmodulations |
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| Authors: | Hwang-Cherng Chow Wu-Shiung Feng |
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| Affiliation: | Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei ; |
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| Abstract: | An analytical delay model of a CMOS inverter that includes channel-length modulation and source-drain resistance as well as high-field effects is introduced. This model is based on the improved short-channel MOSFET model derived from a quasi-two-dimensional analysis of operation in the saturation region. Calculations of the rise, fall, and delay times show good agreement with SPICE MOS level three simulations |
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