首页 | 本学科首页   官方微博 | 高级检索  
     

基于远程动态可重构的WSN节点研究与实现
引用本文:李沂滨 贾智平 谢 帅 刘福财. 基于远程动态可重构的WSN节点研究与实现[J]. 计算机研究与发展, 2014, 51(1): 173-179.
作者姓名:李沂滨  贾智平  谢帅  刘福财
作者单位:1.(山东大学计算机科学与技术学院 济南 250101) (liyibing@sdu.edu.cn)
基金项目:国家国际科技合作专项(2011DFR20090);海洋公益性行业科研专项(201205036-04)
摘    要:作为近年来的一个研究热点,无线传感网 (wireless sensor network, WSN)是一项可能改变现有工作与生活方式的技术.一个无线传感网系统可能由几十个到上万个节点组成.每个节点在保证具有足够的信息处理和通信能力的前提下,还需要满足低功耗和低成本的要求.从高效能计算的角度看,以FPGA为代表的可重构硬件已经被证明是提高系统计算效能的重要方式.传统上,在嵌入式系统中,FPGA被认为并不适用于低功耗设计.然而,FPGA的可重构不仅包括静态可重构还包括远程的部分动态可重构(partial dynamic reconfiguration, PDR).通过对芯片的某一特定区域的时分复用,在所需芯片面积减小的情况下,芯片的功耗可以大大减少.除此之外,WSN部署后的维护和功能的更新也可以通过FPGA芯片的远程PDR来实现.描述了基于远程硬件PDR技术的WSN节点.通过对几个典型算法(IIR,GPSR,SHA-2,FFT)的PDR实现,得出节点的功耗、面积与存储消耗,并与软件实现方式进行了比较.实验结果表明,通过采用 PDR技术,在计算时间减少的情况下,所需的芯片面积减少27%,运行时功耗最多可减少60%(829mW).

关 键 词:无线传感网  FPGA  低功耗  部分动态可重构  无线传感网节点

Partial Dynamic Reconfigurable WSN Node with Power and Area Efficiency
Li Yibin, Jia Zhiping, Xie Shuai, and Liu Fucai. Partial Dynamic Reconfigurable WSN Node with Power and Area Efficiency[J]. Journal of Computer Research and Development, 2014, 51(1): 173-179.
Authors:Li Yibin  Jia Zhiping  Xie Shuai  and Liu Fucai
Affiliation:1.(School of Computer Science and Technology, Shandong University, Jinan 250101)
Abstract:WSN can fundamentally change the way of our life. For a WSN system, up to 10000s nodes are expected. Each node needs to be low cost, low power, with reasonal communication and processing capacity. Meanwhile, FPGAs are demonstrated as an approach to improve processing performance efficiently. Conventionally, in embedded system design like WSN, mainly due to the limitation of energy budget, the inclusion of reconfigurable HW is considered as unacceptable. However, FPGA can not only permit static configurability in field, but also enable partial dynamic configurability (PDR) remotely. Both power and area can be saved through mapping different hardcores to one certain chip area. Futhermore, by implemeing PDR technique, each node can be maintained during its lifetime remotely. All those characteristics are demanding in WSN. As a result, it becomes the author's interest to investigate the feasibility of FPGA for WSN. In this paper, a prototype and related design flow are presented and several test cases are used to evaluate the cost of PDR. Finally, it is demonstrated 60% less power cost with 27% area saving.
Keywords:WSN(wireless sensor network)  FPGA  low power  partial dynamic configurability  WSN node
本文献已被 CNKI 等数据库收录!
点击此处可从《计算机研究与发展》浏览原始摘要信息
点击此处可从《计算机研究与发展》下载全文
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号