基于FPGA内嵌入式处理器的二维脉冲压缩

设计一个利用现场可编程门阵列(FPGA)内部MicroBlaze嵌入式处理器为核心控制单元的二维脉冲压缩处理系统。根据FPGA内部不同的资源配置情况，提出2种脉冲压缩处理模块的实现结构，利用FPGA实现DDR SDRAM控制器，采用矩阵分块线性映射的方法实现高效的数据矩阵转置处理。通过模拟一个简单的合成孔径雷达成像处理过程，证明该系统的有效性。

Two Dimensional Pulse Compression Based on Embedded Processor in FPGA

This paper designs a two dimensional pulse compression processing system by using the embedded processor MicroBlaze in FPGA as the control kernel. Two realization architectures of pulse compression are presented according to the resource assignment conditions in FPGA. DDR SDRAM controller implemented by FPGA realizes matrix transposition processing efficiently by using matrix partition linear mapping method. A simple SAR imaging processing is simulated, and its result proves the validation of the system.