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一种改进的CMOS无稳态多谐振荡器
引用本文:崔嵬,韩月秋,陈禾. 一种改进的CMOS无稳态多谐振荡器[J]. 北京理工大学学报(英文版), 2002, 11(4): 360-363. DOI: 10.3969/j.issn.1004-0579.2002.04.006
作者姓名:崔嵬  韩月秋  陈禾
作者单位:北京理工大学,电子工程系,北京,100081
基金项目:theMinisterialLevelAdvancedResearchFoundation
摘    要:设计了一种新颖的CMOS无稳态多谐振荡器,克服了传统设计中时钟占空比依赖于工艺参数的缺陷.改进的设计不仅能产生占空比为50%的时钟信号,而且能有效地预防电路闩锁.所有的改进几乎不增加电路的动态功耗,因此新设计有广泛的工程应用前景.

关 键 词:互补金属氧化物半导体  专用集成电路  无稳态多谐振荡器  占空比  闩锁效应  二分频
收稿时间:2002-01-19

An Improved On-Chip CMOS Astable Multivibrator
CUI Wei,HAN Yue-qiu and CHEN He. An Improved On-Chip CMOS Astable Multivibrator[J]. Journal of Beijing Institute of Technology, 2002, 11(4): 360-363. DOI: 10.3969/j.issn.1004-0579.2002.04.006
Authors:CUI Wei  HAN Yue-qiu  CHEN He
Affiliation:Department of Electronics Engineering, Beijing Institute of Technology, Beijing100081, China;Department of Electronics Engineering, Beijing Institute of Technology, Beijing100081, China;Department of Electronics Engineering, Beijing Institute of Technology, Beijing100081, China
Abstract:An improved on-chip CMOS astable multivibrator is proposed, which overcomes the shortcomings of the traditional one that the signal duty-cycle is depending on model parameters, and generates stable clock signal with duty-cycle equaling 50%. The latch-up effect has been prevented on the improved circuit. It is extremely important that all the excellent performances of the improved astable multivibrator have been achieved with a dynamic power consumption equaling its predecessor one. The advantage of the structure has been verified by SPICE simulation.
Keywords:CMOS  ASIC  astable multivibrator  duty-cycle  latch-up effect  two divided-frequency
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