Characterization of Floating Gate Defects in Analog Cells |
| |
Authors: | Anna M. Brosa Joan Figueras |
| |
Affiliation: | (1) Departament d'Enginyeria Electrònica, Universitat Politècnica de Catalunya, Diagonal, 647 08028 Barcelona, Spain |
| |
Abstract: | A unified approach to tackle the characterization of the floating gate defect in analog and mixed-signal circuits is introduced. An electrical level model of the defective circuit is proposed extending previous models used effectively in the digital domain. The poly-bulk, poly-well, poly-power rail and metal-poly capacitances are significant parameters in determining the behavior of the floating gate transistor. The model is used to analyze the feasibility of testing a simple analog cell with the floating gate defects through the observation of the quiescent current consumption and the dynamic behavior. |
| |
Keywords: | floating gate defect analog testing low-power/low-voltage analog circuits |
本文献已被 SpringerLink 等数据库收录! |