| 高速交换机设计中的信号完整性问题 |
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| 引用本文： | 李楠,刘琼,吴志美.高速交换机设计中的信号完整性问题[J].计算机工程,2006,32(10):237-239,242. |
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| 作者姓名： | 李楠 刘琼 吴志美 |
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| 作者单位： | 中国科学院软件研究所,北京,100080 |
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| 摘 要： | 高速通信设备的信号完整性问题至关重要。该文基于一款3层交换机的设计实现，分析讨论了信号完整性中的主要问题，如电源分配系统噪声、时钟抖动、传输延迟、传输线阻抗等，并根据实践结果总结了相应的解决办法。
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| 关 键 词： | 信号完整性 电源噪声 时钟抖动 阻抗 |
| 文章编号： | 1000-3428（2006）10-0237-03 |
| 收稿时间： | 2005-07-06 |
| 修稿时间： | 2005-07-06 |
Signal Integrity for the Design of High Speed Switch |
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| LI Nan,LIU Qiong,WU Zhimei.Signal Integrity for the Design of High Speed Switch[J].Computer Engineering,2006,32(10):237-239,242. |
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| Authors: | LI Nan LIU Qiong WU Zhimei |
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| Affiliation: | Institute of Software, Chinese Academy of Sciences, Beijing 100080 |
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| Abstract: | The signal integrity issue is very important in the design of high-speed communication devices. This paper addresses some signal integrity problems encountered during the design of a layer-3 switch, such as the noise of power distribution system, clock jitter, propagation delay and impedance of transmission line, The techniques are summarized for solving these problems. |
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| Keywords: | Signal integrity Noise of power Clock jitter Impedance |
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