基于CPRI协议的FPGA高速数据传输模块设计与实现

随着通信技术不断发展，CPRI协议作为无线基站的接口规范逐步完善，可支持的数据速率不断提高。本课题基于“新一代宽带无线通信网”国家科技重大专项：TD-LTE基站基带与射频模块间接口（Ir接口）仿真与监测工具开发。本文为了测试基带设备对IQ数据的处理能力，基于FPGA实现对用户数据（IQ数据）的实时高速传输至上位机进行存储。通过比较现有高速数据传输技术，提出采用分层化，模块化的设计思想，利用FPGA实现UDP/IP协议栈，通过千兆以太网传输至上位机。通过测试验证，本模块可实现对IQ数据的实时高速传输，满足设计要求。

CPRI Protocol Based FPGA High-speed Data Transmission Module Design and Implementation

CPRI protocol as the communication technology unceasing development, gradually improve as a wireless base station interface speciifcation, can support data rate continuously improve. This topic is based on＆quot;a new generation broadband wireless communication network＆quot;national science and technology major projects：the td-scdma baseband and rf module LTE base station indirect mouth interface （Ir interface） simulation and monitoring tool development. In this paper, in order to test the baseband equipment of IQ data processing capabilities, based on the FPGA implementation of user data （IQ） of real-time transmission ifrst place machine for storage at a high speed. By comparing the existing high speed data transmission technology, put forward the method of layered and modularized design idea, using FPGA to realize the UDP/IP protocol stack, through the supremacy of gigabit Ethernet transmission machine. Through test validation, this module can realize the IQ real-time high-speed data transmission, meet the design requirement.