| 时序冲突及时序检查 |
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| 引用本文： | 曾献君,毛志刚.时序冲突及时序检查[J].微电子学与计算机,1994,11(3):5-9,13. |
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| 作者姓名： | 曾献君 毛志刚 |
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| 作者单位： | 哈尔滨工业大学ＩＣ—ＣＡＤ研究室 |
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| 摘 要： | 本文介绍一个多相同步时序数字电路的时序模型及时序冲突的检验算法。该方法能检查出时序冲突类型，冲突的具体位置及时钟系统设置的合理性。该算法已在Ｓｕｍ－４／ＳＰＡＲＣ上实现，能快速准确检查出非覆盖多相时钟同时时序电路存在的时序冲突，冲突覆盖率高。
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| 关 键 词： | 数字电路 时序电路 时序冲突 算法 |
Synchronous Violations and Timing Verification |
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| Zeng Xianjun,Mao Zhigan,Lai Fengchang,Ye Yizheng.Synchronous Violations and Timing Verification[J].Microelectronics & Computer,1994,11(3):5-9,13. |
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| Authors: | Zeng Xianjun Mao Zhigan Lai Fengchang Ye Yizheng |
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| Abstract: | This paper introduces a synchronous model forthe non-cover multiphase synchronous digital circuitand presents a timing verification algorithm based onthe model. Given a specified clock schedule,the algorithm can detect whether there are some setup or hold time violations in the circuit, report the source and the scope of the synchronous violations. This algorithm has been implemented on a Sun-4/SPARC workstation. It can fastly detect the synchronous violations in the non-cover multiphase synchronous cirsuits. Most of the timing errors in the processed circuit have been detected. |
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| Keywords: | Timing verification Synchronous sircuits Clock skew Multiphase clocks |
| 本文献已被 CNKI 维普 等数据库收录！ |
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