通用密码处理器在FPGA中的实现

考虑密码应用中存在密码算法基本操作的多样性、使用的复杂性和安全需求等因素,讨论了一种通用密码处理器的设计方案,并在FPGA上实现了该设计的原型。原型的主要设计思想是在一个精简的64位处理器中挂上所需要的密码算法功能部件再增加相应的指令。该原型支持39条指令,除DES、AES和正规基乘法MMU外其它指令都在一个时钟周期完成。支持DES、3DES和AES算法的任意工作模式,同时支持RSA、特征P和特征2上最优正规基的ECC。

Implementation of General Cipher Processor Based on FPGA

There are many problems in cipher application such as the variety of basic operations,the complexity of schemes and security requirement.To meet these problems,the general cipher processor is designed,and the prototype of the chip is implemented based on FPGA.The design idea of the prototype is a reduce processor with 64 bits data bus,attached cipher algorithm parts which are needed.The prototype supports 39 instructions;the executive cycle is one clock per instruction except DES,AES and MMU(normal basic multiplication).It supports any mode of DES,3DES and AES algorithm,and it also supports RSA and ECC(GF(P)and GF(2m)with normal basic).