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封装寄生参数对并联IGBT芯片瞬态电流分布的影响规律
引用本文:石浩,吴鹏飞,唐新灵,董建军,韩荣刚,张朋.封装寄生参数对并联IGBT芯片瞬态电流分布的影响规律[J].中国电力,2019,52(8):16-25.
作者姓名:石浩  吴鹏飞  唐新灵  董建军  韩荣刚  张朋
作者单位:1. 全球能源互联网研究院有限公司, 北京 102209;2. 国网山西省电力公司晋城供电公司, 山西 晋城 033000
基金项目:国家科技重大专项集成电路专项资助项目(2015ZX02301),国家电网公司科技项目(GEIRI-GB-71-17-001)。
摘    要:大功率IGBT器件通过并联多个IGBT芯片来获得大电流等级,并联芯片动静态电流分布的一致性对于提高器件电流等级以及可靠性至关重要。首先介绍了大功率IGBT模块内部布局不一致导致的封装寄生参数差异性。其次,结合IGBT等效电路模型及其开关特性,分析了寄生参数差异性对于并联IGBT芯片瞬态电流分布特性的影响规律。最后,建立了并联IGBT芯片的等效电路模型,并应用Synopsys Saber软件建立了仿真电路,从封装寄生电感参数差异性、封装寄生电阻参数差异性,分析了参数差异对并联芯片的瞬态电流分布特性的影响。

关 键 词:IGBT  并联芯片  寄生电感  寄生电阻  瞬态电流分布  
收稿时间:2018-05-22
修稿时间:2018-11-19

Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips
SHI Hao,WU Pengfei,TANG Xinling,DONG Jianjun,HAN Ronggang,ZHANG Peng.Influence of Package Parasitic Parameters on Transient Current Distribution of Paralleled IGBT Chips[J].Electric Power,2019,52(8):16-25.
Authors:SHI Hao  WU Pengfei  TANG Xinling  DONG Jianjun  HAN Ronggang  ZHANG Peng
Affiliation:1. Global Energy Interconnection Research Institute Co. Ltd., Beijing 102209, China;2. State Grid Jincheng Electric Power Supply Company, Jincheng 033000, China
Abstract:High power IGBT usually use multiple chips in parallel to achieve large current. The consistency of the dynamic and static current distribution of parallel chips is essential to improve the current level and reliability of devices.At first, the difference of package parasitic parameters caused by inconsistent internal layout of paralleled IGBT chips is introduced in this paper. Secondly, combined with the equivalent circuit model of IGBT and its switching characteristics, the influence of parasitic parameters on the transient current distribution characteristics of parallel IGBT chips is analyzed. Then, the equivalent circuit model of parallel IGBT chip is established, and the simulation circuit is built by Synopsys Saber software. From the differences of package parasitic inductance parameters and package parasitic resistance parameters, the influence of parameters differences on the transient current distribution characteristics of parallel chip is analyzed. In this paper, the influence of various package parasitic parameters on the transient current distribution is considered comprehensively, which is of great significance for optimizing the transient current consistency of multi-chip parallel connection.
Keywords:IGBT  parallel chips  parasitic inductance  parasitic resistance  transient current distribution  
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