| 全ROM化并行乘法器 |
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| 引用本文： | 洪炳熔. 全ROM化并行乘法器[J]. 哈尔滨工业大学学报, 1987, 0(3) |
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| 作者姓名： | 洪炳熔 |
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| 作者单位： | 哈尔滨工业大学计算机教研室 |
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| 摘 要： | 本文提出全ROM化并行乘法器的构成方法,这种乘法器由于抛弃CLA型加法器,而采用全ROM化多输入并行加法网络作为部分积的加法电路,比Wallace方式和Dadda方式大大提高乘法速度。全ROM化乘法器具有结构简单、速度快、容易实现LSI化和CAD化的优点。因此,作为新型运算部件,在智能化仪器和数字专用处理器中具有极好的推广价值。
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| 关 键 词： | ROM 并行乘法器 多输入并行加法网络 |
Parallel Multiplier with ROMs |
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| Hong Bingrong. Parallel Multiplier with ROMs[J]. Journal of Harbin Institute of Technology, 1987, 0(3) |
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| Authors: | Hong Bingrong |
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| Affiliation: | Hong Bingrong |
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| Abstract: | This paper presents a new algorithm for the construction of a parallel multiplier with ROMs. Because a multiple-input parallel addition network with ROMs is used as an adder circuit of a part of products instead of the carry-lookahead adder, this multiplier operates much faster than the schemes of Wallace and Dadda. It has many advantages-simple construction, fast operation, and easy realization of LSI and CAD. Therefore, as a new type of operational unit it is worth extending its application in those intelligent instrument and digital signal processors. |
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| Keywords: | ROM parallel multiplier multiple-input parallel addition network. |
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