| 边界扫描技术在FPGA测试中的应用 |
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| 引用本文： | 陈庆孔.边界扫描技术在FPGA测试中的应用[J].计算机与数字工程,2010,38(9):62-65,72. |
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| 作者姓名： | 陈庆孔 |
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| 作者单位： | 南京电子技术研究所,南京,210039 |
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| 摘 要： | 边界扫描技术是标准化的可测试性设计技术,它提供了对器件的功能、互连及相互间影响进行测,极大地方便了对于复杂电路的测试。文章针对XCV600_HQ240,介绍了边界扫描的基本结构、边界扫描测试操作流程、测试接口和IEEE 1149.1标准规定的数据寄存器和指令寄存器,结合FPGA芯片的BSDL文件进行边界扫描配置和测试。
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| 关 键 词： | 边界扫描测试 现场可编程逻辑阵列 IEEE1149.1 |
Application of Boundary-Scan for Testing FPGA |
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| Chen Qingkong.Application of Boundary-Scan for Testing FPGA[J].Computer and Digital Engineering,2010,38(9):62-65,72. |
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| Authors: | Chen Qingkong |
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| Affiliation: | Chen Qingkong (Nanjing Research Institute of Electronics Technology, Nanjing 210039) |
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| Abstract: | Boundary-scan test technology is a standard measurability design technology, it provides method to carryout the measurement of device function, interconnection and influence to each other, and is more convenient for the measurement of complex circuits. This paper is for the study of XCV600_HQ240. The basic architecture of boundary-scan and the operation flow of boundary-scan test are introduced in the paper. Test ports, data registers and instruction registers are presented in IEEE1149. 1. Boundary-scan test design is carried out with integration to the BSDL document of FPGA chip. |
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| Keywords: | IEEE 1149 1 |
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