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基于双核处理器的主动磁悬浮轴承容错控制架构
引用本文:程鑫,刘晗,王博,梁典,陈强. 基于双核处理器的主动磁悬浮轴承容错控制架构[J]. 山东大学学报(工学版), 2018, 48(2): 72-80. DOI: 10.6040/j.issn.1672-3961.0.2017.610
作者姓名:程鑫  刘晗  王博  梁典  陈强
作者单位:1. 武汉理工大学机电工程学院, 湖北 武汉 430070;2. 湖北省磁悬浮轴承工程技术研究中心, 湖北 武汉 430070
基金项目:国家自然科学基金资助项目(51575411);中央高校基本科研业务费专项资助项目(2017III046、2017III044)
摘    要:为了满足针对多自由度磁悬浮支承系统的故障诊断与实时控制需求,提出一种基于异构的双核处理器ARM+DSP架构。硬件配置上以数字信号处理器(digital signal processing, DSP)作为从处理器执行多个环路的故障监测;而高级精简指令集处理器(advanced RISC Machines, ARM)作为主控制器执行转子位置控制算法,并根据从控制器的故障重构控制器而实现容错;软件结构上提出基于双核处理器的信息交互、任务分配与执行的设计方法,设计了双向中断来协调控制与监控代码间的执行时序。试验得到系统故障诊断与实时容错控制仅需1.8 ms,能够满足系统需求。试验结果证明了本研究所提出架构的有效性。

关 键 词:故障诊断  双向中断通讯  主动磁轴承  容错控制  双核处理器  共享数据交互  
收稿时间:2017-09-14

A fault-tolerant control architecture for active magnetic bearing based on dual core processor
CHENG Xin,LIU Han,WANG Bo,LIANG Dian,CHEN Qiang. A fault-tolerant control architecture for active magnetic bearing based on dual core processor[J]. Journal of Shandong University of Technology, 2018, 48(2): 72-80. DOI: 10.6040/j.issn.1672-3961.0.2017.610
Authors:CHENG Xin  LIU Han  WANG Bo  LIANG Dian  CHEN Qiang
Affiliation:1. School of Mechanical and Electronic Engineering, Wuhan University of Technology, Wuhan 430070, Hubei, China;2. Hubei Maglev Engineering Technology Research Center, Wuhan 430070, Hubei, China
Abstract:To satisfy the fault diagnosis of multi degree of freedom magnetic bearing system and the real-time control requirements, an ARM+DSP based heterogeneous dual core processor architecture was proposed. In hardware configuration, DSP was used as the fault monitoring to execute multiple loops, ARM was used as the main controller to implement the rotor position control algorithm, and the fault-tolerant controller was implemented according to the fault reconfiguration of the controller. In software architecture, a method of information interaction, task allocation and execution based on dual core processor was proposed, and bidirectional interrupt was designed to coordinate the execution sequence between control and monitoring code. In the experiment, the system fault diagnosis and real time fault tolerant control needed only 1.8 ms. Experiment results showed the effectiveness of the proposed architecture.
Keywords:fault tolerant control  active magnetic bearing  shared data interaction  dual core processor  fault diagnosis  dual-direction interrupted communication  
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