| IEEE802.16接收机检测模块的FPGA实现 |
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| 引用本文： | 李明,刘佩林,陈容. IEEE802.16接收机检测模块的FPGA实现[J]. 微计算机信息, 2006, 22(23): 61-63 |
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| 作者姓名： | 李明 刘佩林 陈容 |
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| 作者单位： | 200030,上海交通大学 |
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| 基金项目： | 国家高技术研究发展计划(863计划) |
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| 摘 要： | 提出了一种采用现场可编程门阵列器件FPGA实现802.16接收端MIMO(多输入多输出)2×2检测的方案。在C语言平台对基于并行干扰消除的最小均方误差的算法进行研究和仿真后,使用Verilog硬件描述语言对MIMO检测各模块分别设计;均通过了综合和验证;这样本文提出了对系统起重要作用的接收端的MIMO检测芯片的实现方法。
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| 关 键 词： | 现场可编程门阵列 多输入多输出 最小均方误差 空时块码 |
| 文章编号： | 1008-0570(2006)08-2-0061-03 |
| 修稿时间： | 2005-12-14 |
Design and Implementation of IEEE 802.16 MIMO Detection on FPGA |
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| Li,Ming,Liu,Peilin,Chen,Rong. Design and Implementation of IEEE 802.16 MIMO Detection on FPGA[J]. Control & Automation, 2006, 22(23): 61-63 |
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| Authors: | Li Ming Liu Peilin Chen Rong |
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| Abstract: | An MIMO(Multiple Input Multiple Output) detection chip is designed by using FPGA based on the IEEE 802.16 standard. The PIC- MMSE algorithm is developed and simulated on C language platform. Each module of MIMO detection chip is designed by Verilog HDL and the function of the whole system is verified by simulation and synthesis. Thus a concise method is discussed for implementation of MIMO detection, which is of vital importance to the broadband wireless access system. |
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| Keywords: | FPGA Multiple Input Multiple Output MMSE Space Time Block Code |
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