| 通用异步串行收发器UART核在DSP芯片中的设计与实现 |
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| 引用本文： | 汪灏,郭二辉. 通用异步串行收发器UART核在DSP芯片中的设计与实现[J]. 中国集成电路, 2011, 20(3): 36-39 |
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| 作者姓名： | 汪灏 郭二辉 |
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| 作者单位： | 中国电子科技集团公司第38研究所,安徽,合肥,230088 |
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| 摘 要： | UART是广泛使用的串行数据通信电路,因其要求的传输线少,可靠性高,传输距离远,所以系统间互联常采用RS—232接口方式。文章基于Verilog HDL语言,结合有限状态机的设计方法来实现UART,将其核心功能集成到DSP上,使整体设计紧凑、小巧,实现的UART功能稳定、可靠,为DSP的RS—232接口提供了一种新的解决方案。该IP核已用于一款32位浮点DSP芯片的设计中。
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| 关 键 词： | Verilog HDL UART 异步通信 状态机 |
Design of a UART IP Cor e for DSP Application |
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| WANG Hao,GUO Er-hui. Design of a UART IP Cor e for DSP Application[J]. China Integrated Circuit, 2011, 20(3): 36-39 |
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| Authors: | WANG Hao GUO Er-hui |
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| Affiliation: | WANG Hao,GUO Er-hui(CETC 38 Research Institute,Hefei 230088 China) |
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| Abstract: | UART is widely used as serial digital communication circuit.Because little transmission line,high dependability and long transmission distance are needed,systems＇connect usually use RS-232 interface mode.The paper based on Verilog HDL language and combine FSM method to design UART.By making its core function integrated on DSP,the whole design is compact and cabinet and actualize UART is stable and reliable.The design provides a new solution to RS—232 interface of DSP.This IP core has been used in a designing 32-bit floating-point digital signal processor（DSP）successfully. |
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| Keywords: | Verilog HDL UART |
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