Built-in test for folded programmable logic arrays |
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| Affiliation: | 1. Department of Chemical Engineering, Shahreza Branch, Islamic Azad University, Shahreza, Iran;2. Young Researchers and Elite Club, West Tehran Branch, Islamic Azad University, Tehran, Iran;3. Department of Materials Engineering, Isfahan university of technology, Isfahan, Iran;4. Department of Chemistry, Firuzabad Branch, Islamic Azad University, Firuzabad, Iran |
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| Abstract: | Implementing a function using a programmable logic array (PLA) can often be very expensive in terms of area. Folding rows and/or columns of a PLA usually leads to a reduction in area. In this paper the problem of fault detection in folded PLAs is considered. A new fault, the ‘cutpoint’ fault, is described and universal test sets for the detection of this fault are presented. Modifications to existing built-in universally testable design techniques for nonfolded PLAs are presented; the new designs are now applicable to folded PLAs. |
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