Optimization of process conditions for the formation of hemispherical-grained (HSG) silicon in high-density DRAM capacitor

We have compared the capacitances of a conventional stacked capacitor and hemispherical-grained silicon (HSG-Si), in which the seeding method was applied to storage electrode of 64 Mbit dynamic random access memory (DRAM) through Si₂H₆-molecule irradiation and annealing for HSG-Si formation. Also, we considered the variation of the HSG-Si thickness due to the phosphorus concentration of storage poly-silicon in process condition and the effect of its thickness on the cell capacitance and failure occurrence, etc. We investigated the effect of the deposition temperature of amorphous poly-silicon on the HSG-Si formation. As a result, the optimum process conditions of the phosphorus concentration, the deposition temperature of storage poly-silicon and the HSG thickness in HSG formation are 3.5–4.5×10¹⁹ atoms/cm³, 530°C and 450 Å, respectively. It is found that the limit thickness of dielectric film of 64 Mbit DRAM capacitor according to the optimized process condition is 65 Å.