基于神经网络的数字电路路径时滞故障测试生成算法

针对数字电路路径时滞故障测试生成较难的问题,提出了基于神经网络的数字电路路径时滞故障测试生成算法。首先应用路径分支转换法则把数字电路转换成与之相对应的部分分支电路,然后用神经网络的方法对部分分支电路的单固定故障生成测试矢量,最后把生成的测试矢量转换成为原数字电路路径时滞故障的测试矢量对。在ISCAS’85国际标准电路上的实验结果表明了本算法的可行性和有效性。

Path Delay Fault Testing Generation Algorithm for Digital Circuits Based on Neural Network

A path delay fault testing generation algorithm for digital circuits based on neural network is proposed because the testing generation for path delay fault in digital circuits is more difficult.The digital circuit is changed into its partial leaf-dag circuit using path-leaf transformation.Then the testing vectors for single stuck-at fault in the partial leaf-dag circuit are generated using neural network method.Finally,the testing vectors are transformed into the test vectors pair for path delay fault in the original digital circuit.The experimental results on ISCAS'85 international standard circuits demonstrate the feasibility and effectiveness of the algorithm.