基于图神经网络的电子设计自动化技术研究进展

在摩尔定律的推动下，工艺节点在不断演进，集成电路设计复杂度也在不断增加，电子设计自动化(EDA)技术面临着来自运行时间与计算资源等诸多方面的挑战。为了缓解这些挑战，机器学习方法已被纳入EDA工具的设计流程中。与此同时，鉴于电路网表作为图形数据的本质，图神经网络(GNN)在EDA流程中的应用正变得越来越普遍，为复杂问题的建模以及最优问题的求解带来了新思路。该文首先对GNN与EDA技术的概念内涵进行了简要的概述，详细地梳理了GNN在高层次综合(HLS)、逻辑综合、布图规划与布局、布线、反向工程、硬件木马检测以及测试点插入等不同EDA设计流程中的主要作用，以及当前基于GNN的EDA技术的一些重要探索。以希望为集成电路设计自动化以及相关领域的研究人员提供参考，为我国先进集成电路产业的发展提供技术支持。

A Survey for Electronic Design Automation Based on Graph Neural Network

Driven by Moore’s law, the aggressive shrinking of feature sizes, and the complexity of the chip design is also steadily increasing. Electronic Design Automation (EDA) technology faces challenges from many aspects such as runtime and computing resources. To alleviate these challenges, machine learning methods are incorporated into the design process of EDA tools. At the same time, given the nature of circuit netlist as graphical data, the application of Graph Neural Network (GNN) in the EDA is becoming more and more common, bring new ideas for modeling complex problems and solving optimal problems. A brief overview of the concept GNN and EDA is presented. The main role of GNN in different EDA stages such as High Level Synthesis (HLS), logic synthesis, floorplan and placement, routing, reverse engineering, hardware trojan detection and test point insertion is summarized. The main role of GNN in the EDA design process is sorted out in detail, as well as some important explorations of current GNN-based EDA technology. It is hoped to provide reference for researchers in integrated circuit design automation and related fields, and provide technical support for China’s advanced integrated circuit industry.