| 存储器内建自测试技术在芯片设计中的应用 |
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| 引用本文： | 殷弼君,黄伟平.存储器内建自测试技术在芯片设计中的应用[J].计算机工程,2008,34(Z1). |
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| 作者姓名： | 殷弼君 黄伟平 |
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| 作者单位： | 华东计算技术研究所,上海,200233 |
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| 摘 要： | 针对SoC芯片中存储器模块的测试问题,在结合设计工具的基础上,提出了存储器的测试结构和方法,并且讨论了存储器模型的应用与调试.
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| 关 键 词： | 可测性设计 存储器内建自测试 双端口寄存器堆文件 |
Design and Implementation of Memory BIST in IC design |
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| YIN Bi-jun,HUANG Wei-ping.Design and Implementation of Memory BIST in IC design[J].Computer Engineering,2008,34(Z1). |
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| Authors: | YIN Bi-jun HUANG Wei-ping |
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| Affiliation: | YIN Bi-jun,HUANG Wei-ping (East China Institute of Computer Technology,Shanghai 200233) |
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| Abstract: | This paper introduces the test of memory in SoC with the aid of design tools,presents the methodology and structure of memory build-in-self-test and discusses the implementation and diagnosis of memory model. |
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| Keywords: | Design For Testability(DFT) memory Build-In-Self-Test(BIST) two-port register file |
| 本文献已被 CNKI 万方数据 等数据库收录！ |
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