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Reliability improvements in 50 nm MLC NAND flash memory using short voltage programming pulses
Authors:Fernanda Irrera  Ivan Piccoli  Massimo Rossini
Affiliation:a Dipartimento Ingegneria Elettronica Università La Sapienza, Via Eudossiana 18, 00185 Roma, Italy
b Micron Technology Italia, Via Cavour 455, 67051 Avezzano (Aq), Italy
Abstract:For the first time, an innovative programming methodology based on the use of ultra-short voltage pulses is applied in NAND flash architecture. The methodology starts from the physics of SILC dynamics and oxide damage, and relies on the trade-off between duration and amplitude of short voltage programming pulses, minimizing the creation of new traps in the tunnel oxide. The short pulses programming technique is applied on a small 50 nm NAND array designed for multibit application. Benefits of the short-pulse operation lie in that data retention and endurance which show meaningful improvements. The result is relevant for application in multibit technology, and opens the way to more aggressive cell scaling rules.
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