一种新型IC保护单元ESD评价方式——TLP测试

集成电路的抗ESD能力主要是通过端口的保护结构组合来实现，如何评价保护结构自身的抗ESD能力，被广大的设计人员所越发重视。文章主要介绍一种新型的集成电路ESD保护结构的抗ESD能力测试方式-TLP（传输线测试）测试方式，文章介绍了TLP测试原理、主要的测试机理以及通过测试实例来解释TLP测试方法的优点，该方法能够准确评价每种ESD保护结构的抗ESD水平，为设计人员提供帮助。文章还把TLP并与常用的器件级ESD评价方法做比较，说明两种方法的不同之处以及相互问的关系。

The New Method for IC ESD Protect Constructures-TLP

To improve IC’s ESD ability mainly depend on IC’s protect structures around the input-pad and output-pad. More and more engineers pay attention to improve IC’s ESD protect structures. This article introduce a new method to test IC’s protect structure-TLP(transmission line pulse)and introduce TLP’s , theory ,and introduce TLP’s test mechanism, and introduce it’s advantages by test samples.TLP can accurately measure the protect structures ESD level. The article compare the TLP and device level ESD test method ,and give the difference and relation between two methods.