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Experience with Applying Formal Methods to Protocol Specification and System Architecture
Authors:Mani Azimi  Ching-Tsun Chou  Akhilesh Kumar  Victor W. Lee  Phamndra K. Mannava  Seungjoon Park
Affiliation:(1) Intel Corporation, SC12-608, 3600 Juliette Lane, Santa Clara, CA 95054, USA
Abstract:In the last three years or so we at Enterprise Platforms Group at Intel Corporation have been applying formal methods to various problems that arose during the process of defining platform architectures for Intel's processor families. In this paper we give an overview of some of the problems we have worked on, the results we have obtained, and the lessons we have learned. The last topic is addressed mainly from the perspective of platform architects.
Keywords:formal verification  cache coherence protocols  sliding window protocols  rule-based checking of tables  minimal deadlock-free wormhole routing schemes  fault-tolerant link initialization
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