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FPGA布线结构的蒙特卡罗评估
引用本文:高海霞,杨银堂,王平. FPGA布线结构的蒙特卡罗评估[J]. 固体电子学研究与进展, 2006, 26(2): 260-263
作者姓名:高海霞  杨银堂  王平
作者单位:西安电子科技大学微电子研究所,西安,710071;西安电子科技大学微电子研究所,西安,710071;西安电子科技大学微电子研究所,西安,710071
摘    要:提出一种基于蒙特卡罗技术的FPGA结构研究新方法。该方法在布线资源中随机产生均匀分布的开路故障,并绕开障碍物布线互连,不依赖于CAD算法和基准电路。开关块拓扑分析实例表明该方法与CAD方法的结论一致,而评估时间从15小时缩短到15分钟。

关 键 词:现场可编程门阵列  布线结构研究  蒙特卡罗
文章编号:1000-3819(2006)02-260-04
收稿时间:2004-11-10
修稿时间:2005-01-11

Monte-Carlo Evaluation of FPGA Routing Architecture
GAO Haixia,YANG Yintang,WANG Ping. Monte-Carlo Evaluation of FPGA Routing Architecture[J]. Research & Progress of Solid State Electronics, 2006, 26(2): 260-263
Authors:GAO Haixia  YANG Yintang  WANG Ping
Abstract:In this paper we propose a stochastic method to evaluate FPGA routing architecture based on a Monte-Carlo approach. Uniform stochastic open faults are produced in the routing resource, and we route interconnections around obstacles. This method does not depend on CAD tools and benchmark circuits. As an example, our method is applied to the comparison of three different switch blocks. We obtain the same conclusion as that of experiment, and run-time has been shortened from 15 hours to 15 minutes.
Keywords:FPGA   routing architecture research   Monte-Carlo
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