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Analysis of tunneling currents in multilayer black phosphorous and $$hbox {MoS}_{2}$$ non-volatile flash memory cells
Authors:Bikash Sharma  Arnab Mukhopadhyay  Amretashis Sengupta  Hafizur Rahaman  C. K. Sarkar
Affiliation:1.NDS Lab, Department of ETCE,Jadavpur University,Kolkata,India;2.School of VLSI Technology,Indian Institute of Engineering Science and Technology, Shibpur,Howrah,India
Abstract:This paper presents a theoretical study of tunneling current density and the leakage current through multi-layer (stacked) trapping layer in the gate dielectric in MOS non-volatile memory devices. Two different 2D materials ((hbox {MoS}_{2}) and black phosphorous) with a combination of high-k dielectric ((hbox {HfO}_{2})) have been used for the study with differently ordered stacks i.e., as trapping layer and substrate. The material properties of 2D materials like density of states, effective mass and band structure has been evaluated using density functional theory simulations. Using the Maxwell–Garnett effective medium theory we have calculated the effective barrier height, effective bandgap, effective dielectric constant and effective mass of the gate dielectric stacks. By applying WKB approximation in the multi-layer trapping layer we have studied the effect of the direct and Fowler–Nordheim tunneling currents. The leakage current in all the different stack combinations used has also been evaluated. The results obtained have shown to match the required dynamics of a memory device.
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