Fully integrated CMOS limiting amplifier with offset compensation network |
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| Authors: | Chen D.D. Yeo K.S. Do M.A. Boon C.C. |
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| Affiliation: | Nanyang Technol. Univ., Singapore; |
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| Abstract: | A fully integrated CMOS limiting amplifier (LA) is presented. Its novel implementation of the offset compensation circuit completely removes bulky off-chip RC components. The LA is designed using a 0.18 mum CMOS technology and it obtains a 40 dB gain with a bandwidth of 1.8 GHz. The total power consumption is only 18.39 mW under a 1.8 V voltage supply. |
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