应用于LCD控制器的分页式帧缓冲接口的研究

随着液晶显示系统在手持设备中的广泛应用，低功耗已经成为液晶显示控制器芯片设计的重要目标。针对LCD控制器数据处理量大和工作频率高的特点，提出了一种新型分页式帧缓冲结构。该结构将帧缓冲分为未压缩页和压缩页两个部分。把用户存放在未压缩页中的显示数据进行压缩后写入到压缩页中，LCD显示时只需要从压缩页中读取数据进行解压缩即可维持刷新。这样降低了LCD控制器访问帧缓冲的频率，从而减小功耗。采用FPGA硬件平台进行性能及功耗评估。评估结果显示该结构在不影响显示性能的情况下显著降低了系统功耗。

Research of Dual-Page Frame Buffer Interface for LCD Controller

Liquid crystal display system is widely used in hand-held devices and low power consumption is regarded as the most important mission of LCD controller chip design. Facing with the problem of power consumption caused by large data stream and high frequency, an architecture-level low power technology based on dual-page frame buffer for LCD controller is presented in this paper. Frame buffer is divided into uncompressed-page and compressed-page in this architecture. Host display data is written to uncompressed-page and LCD controller uncompress display data from compressed-page for refreshing. FPGA platform is used for verifying the effect of power consumption optimization. This architecture is proved to reduce the power consumption of the display system greatly without reducing performance through power analysis and comparison.