Design and verification of fault tolerant systems with CSP |
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Authors: | Jan Peleska |
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Affiliation: | (1) DST Deutsche System-Technik GmbH, Edisonstrasse 3, W-2300 Kiel 14, Federal Republic of Germany |
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Abstract: | Summary By means of an example, we present a formal method based on CSP to design fault tolerant systems. This method combines algebraic and assertional techniques to achieve complete formal verification of the fault tolerant system's correctness properties. Verification steps are executed in parallel with top-down design, so that correctness proofs can be clearly structured and their completeness easily checked. In this way formal verification is applicable not only to small examples but to reasonably large systems.
Jan Peleska was born in 1958 in Hamburg, received his Diploma in Mathematics from the University of Hamburg in 1981 and a Ph.D. in Mathematics in 1982. From 1981 to 1984 he worked in research and software development projects in the field of accoustics. Since 1984 he has been working with Philips and DST in Kiel in the field of distributed information systems. Peleska's current research interests include fault tolerant systems, distributed database systems and formal design and verification methods. |
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Keywords: | Fault tolerant systems Formal specification Formal verification Invent and verify paradigm Top-down design CSP |
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