首页 | 本学科首页   官方微博 | 高级检索  
     

三维互连中光刻及晶圆级键合技术的挑战、趋势和解决方案
引用本文:Margarete Zoberbier,;Erwin Hell,;Kathy Cook,;Marc Hennemayer,;Dr.-Ing. Barbara Neubert. 三维互连中光刻及晶圆级键合技术的挑战、趋势和解决方案[J]. 电子工业专用设备, 2009, 38(3): 35-41
作者姓名:Margarete Zoberbier,  Erwin Hell,  Kathy Cook,  Marc Hennemayer,  Dr.-Ing. Barbara Neubert
作者单位:Margarete Zoberbier,Marc Hennemayer,Dr.-Ing. Barbara Neubert(SUSS MicroTec Lithography GmbH,85276 Garching,Schleissheimerstr.90,Germany);Erwin Hell(SUSS MicroTec Shanghai Co.,Ltd.Room 3703 Nanzheng Building,580 Nanjing Road West,Shanghai 200041,P.R.China);Kathy Cook(SUSS MicroTec Inc.,228 Suss Drive,Waterbury Center,VT.05677,USA)  
基金项目:Acknowledgments I would like to acknowledge all the co-authors of this paper for their support in creating this paper.
摘    要:基于它的技术优势三维集成技术正在不断地被应用到新的产品中,也包括被应用到消费电子产品里。N时也对许多工艺提出了新的要求,其中也包括光刻和晶圆级键合。三维集成技术还是需要光刻工艺来完成图形的转换.为此.讨论了三维集成工艺对工艺设备和技术提出的挑战。介绍了SUSS公司与三维技术相关的产品。着重讨论与三维集成工艺相关的光刻和键合工艺。描述了三维集成对它们提出的挑战以及目前已有的解决方案和前景。并介绍一款新的具有0.25汕m对准精度的接近接触式光刻机。

关 键 词:三维互连技术  光刻  晶圆级键合

Challenges, Trends and Solutions for 3D Interconnects in Lithography and Wafer Level Bonding Techniques
Margarete Zoberbier,Erwin Hell,Kathy Cook,Marc Hennemayer,Dr.-Ing. Barbara Neubert. Challenges, Trends and Solutions for 3D Interconnects in Lithography and Wafer Level Bonding Techniques[J]. Equipment for Electronic Products Marufacturing, 2009, 38(3): 35-41
Authors:Margarete Zoberbier  Erwin Hell  Kathy Cook  Marc Hennemayer  Dr.-Ing. Barbara Neubert
Affiliation:SUSS MicroTec Lithography GmbH,85276 Garching,Schleissheimerstr.90,Germany;SUSS MicroTec Shanghai Co.,Ltd.Room 3703 Nanzheng Building,580 Nanjing Road West,Shanghai 200041,P.R.China;SUSS MicroTec Inc.,228 Suss Drive,Waterbury Center,VT.05677,USA
Abstract:Technology advances such as 3D Integration are expanding the potential applications of products into mass markets such as consumer electronics. These new technologies are also pushing the envelope of what's currently possible for many production processes, including lithography processes and wafer bonding.There is the need to coat, pattern and etch structures which may have tens or even hundreds of microns in height. This paper will explore some of the lithographic challenges associated with 3D interconnection technology, where use of the vertical dimension has necessitated new methods of conformally coating high topography, new imaging techniques to align various masking levels to the underlying patterns, and new exposure techniques to accomplish high fidelity patterning over such high structures. Wafer bonding techniques as used in the 3D Packaging will be described with all the challenges and available solutions and trends. Furthermore a new Maskalinger technology will be introduced which allows extreme alignment accuracy assisted by pattern recognition down to 0.25 μm.
Keywords:3D Interconnects  Lithography  Wafer Level Bonding
本文献已被 维普 万方数据 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号