GigaHertz MUX-DEMUX Chip with HF BIST |
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Authors: | Lars Hellberg Owe Thessén Hannu Tenhunen José-Maria Gobbi |
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Affiliation: | (1) Electronic Systems Design Laboratory (ESDlab), KTH-Electrum, Royal Institute of Technology, Kista, Sweden;(2) Ericsson Components AB, MERC, Kista, Sweden |
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Abstract: | Full functional test at speed, in-situ is an ideal choice for use for detection of errors in circuit behaviour for high speed broadband communication circuits and to avoid test set-up disturbances on high frequency signals. This article presents a novel technique to solve the high frequency test of Gbit/s data rate Time-Division Multiplexer/Demultiplexer circuits. This in-situ test technique is based on conventional pseudo-random sequence generation and signature analysis. By linear feedback interconnect and reusable architecture the multiplexer/demultiplexer circuits can operate as generator/analyser with minimal degeneration of bit shift rate. Circuit simulation showed that the system operates correctly with a clock frequency up to 3 GHz in a silicon bipolar technology with a current gain cut-off frequency f
T = 15 GHz. |
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Keywords: | high frequency multiplexer/demultiplexer circuits built-in self-test |
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