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Control of filament size and reduction of reset current below 10 μA in NiO resistance switching memories
Authors:F Nardi  D IelminiC Cagli  S SpigaM Fanciulli  L GouxDJ Wouters
Affiliation:a Dipartimento di Elettronica e Informazione - DEI, Politecnico di Milano and IUNET, Milano, Italy
b Laboratorio MDM, Istituto per la Microelettronica e Microsistemi - IMM, CNR, Agrate Brianza, Italy
c IMEC, Kapeldreef 75, 3001 Leuven, Belgium
Abstract:Resistive-switching memory (RRAM) is receiving a growing deal of research interest as a possible solution for high-density, 3D nonvolatile memory technology. One of the main obstacle toward size reduction of the memory cell and its scaling is the typically large current Ireset needed for the reset operation. In fact, a large Ireset negatively impacts the scaling possibilities of the select diode in a cross-bar array structure. Reducing Ireset is therefore mandatory for the development of high-density RRAM arrays. This work addresses the reduction of Ireset in NiO-based RRAM by control of the filament size in 1 transistor-1 resistor (1T1R) cell devices. Ireset is demonstrated to be scalable and controllable below 10 μA. The significance of these results for the future scaling of diode-selected cross-bar arrays is finally discussed.
Keywords:Resistive-switching memory (RRAM)  Transition metal oxide  Crossbar architecture  Nonvolatile memory
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