A self-convergence erase for NOR flash EEPROM using avalanche hotcarrier injection |
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Authors: | Yamada S. Yamane T. Amemiya K. Naruke K. |
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Affiliation: | Microelectron Eng. Lab., Toshiba Corp., Kanagawa ; |
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Abstract: | A new erasing method for simple stacked gate NOR Flash EEPROM's is proposed and is applied to 2 M bit NOR Flash test array using 0.6 μm CMOS technology. Due to avalanche hot carrier injection after erasure by Fowler-Nordheim (F-N) tunneling current, the threshold voltages converge to a certain steady state. The steady state is a point of balance between the avalanche hot electron injection and the avalanche hot hole injection into the floating gate, and can be controlled easily by the channel doping and the applying control-gate voltage during convergence operation. The erasing method eliminates the problem of over-erased cells and realizes highly stable flash memory erasure |
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