Ta2O5/silicon barrier height measured fromMOSFETs fabricated with Ta2O5 gate dielectric |
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Authors: | Chihming Lai B Jing-Chi Yu Ya-Min Lee J |
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Affiliation: | Dept. of Electr. Eng., Tsinghua Univ., Beijing ; |
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Abstract: | N-channel metal oxide semiconductor field effect transistors with Ta2O5 gate dielectric were fabricated. The Ta2O5/silicon barrier height was calculated using both the lucky electron model and the thermionic emission model. Based on the lucky electron model, a barrier height of 0.77 eV was extracted from the slope of the ln(Ig/Id) versus ln(Isub/Id) plot using an impact ionization energy of 1.3 eV. Due to the low barrier height, the application of Ta2 O5 gate dielectric transistors is limited to low supply voltage preferably less than 2.0 V |
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