| UWB系统中（解）交织器低复杂度的实现 |
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| 引用本文： | 李晶峰,王雪静,叶凡,任俊彦. UWB系统中（解）交织器低复杂度的实现[J]. 计算机工程, 2009, 35(7): 217-219 |
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| 作者姓名： | 李晶峰 王雪静 叶凡 任俊彦 |
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| 作者单位： | 复旦大学专用集成电路与系统国家重点实验室微纳电子科技创新平台,上海,201203 |
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| 基金项目： | 上海应用材料研究与发展项目，英特尔博士生论文基金，上海市科委集成电路设计(SDC)专项基金 |
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| 摘 要： | 提出一种低复杂度的（解）交织器现场可编程门阵列实现方法，采用Xilinx FPGA自带的双端口存储器，能有效降低FPGA资源的消耗，且输入位宽和输出位宽无需相同，适用于多带正交频分复用超宽带系统。实验结果表明，系统所占用的slices数目对于交织器和解交织器来说分别降低了46％和78％。
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| 关 键 词： | 正交频分复用 超宽带 现场可编程门阵列 |
Implementation of Low-complexity for (De)-Interleaver in UWB System |
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| LI Jing-feng,WANG Xue-jing,YE Fan,REN Jun-yan. Implementation of Low-complexity for (De)-Interleaver in UWB System[J]. Computer Engineering, 2009, 35(7): 217-219 |
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| Authors: | LI Jing-feng WANG Xue-jing YE Fan REN Jun-yan |
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| Affiliation: | Micro/Nanoelectronics Science & Technology Innovation Platform;State Key Lab of ASIC and System;Fudan University;Shanghai 201203 |
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| Abstract: | A novel method to implement low-complexity Field Programmable Gate Array(FPGA) for(de)interleaver is proposed, which uses dual-proted memory of Xilinx FPGA.The consumption for resources to FPGA is reduced and the read-width is not necessarily equal to write-width.It is fitting to Multi-Bandwidth Orthogonal Frequency Division Multiplex(MB-OFDM) Ultra-Wide Bandwidth(UWB) systems.Experimental results show the numbers of occupied slices are reduced by 46% and 78% for interleaver and deinterleaver respectively. |
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| Keywords: | Orthogonal Frequency Division Multiplex(OFDM) Ultra-Wide Bandwidth(UWB) Field Programmable Gate Array(FPGA) |
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