An improved model for four-terminal junction field-effecttransistors |
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Authors: | Liou J.J. Yue Y. |
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Affiliation: | Dept. of Electr. & Comput. Eng., Central Florida Univ., Orlando, FL; |
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Abstract: | The junction field-effect transistor (JFET) has isolated top- and bottom-gate terminals and therefore is useful for signal mixing applications. Existing models for the four-terminal JFET often have the same form as the three-terminal JFET model, however, in which only a single pinch-off voltage is used to describe the current-voltage characteristics. In this paper, a more general four-terminal JFET model is developed. Two different pinch-off voltages are involved in the improved model to account more comprehensively for the effects of both depletion regions associated with the top- and bottom-gate junctions. Results simulated from a device simulator are also included in support of the model |
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