基于FPGA实现高速串行链路数据恢复的方法

为解决高速串行链路数据时钟异步时数据恢复问题.提出了基于FPGA的高速申行链路数据恢复方案,设计了本地时钟与锁相环输出时钟组成的混合时钟城,阐述了在不同相位高速申行数据采样原理与采样过程,分析了采样位2判决原理与数据有效判别方法,实现了高速申行链路数据的恢复;通过逻辑仿X与试验验证,在时钟速率与数据速率不同的情况下,该方法能够有效恢复申行数据,数据速率可达400Mb/s,在数据通讯领域有广泛应用前景.

Data Recovery Method of High-Speed Serial Link Based on FPGA

In order to recover data from the high-speed serial link when the data and clock are not synchronous,the FPGA-based data recovery solution is proposed.This paper designs the clock domains composed of the local clock and the PLL output clock,describes the high-speed serial data sampling theory and sampling process in the different phase domains,analyzes the sampling position judgment and data effectiveness identification method,realizes the data recovery from high-speed serial links.By the simulation and pra...