| 采用LMS数字校准的13位200MSPS ADC设计 |
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| 引用本文： | 高俊枫,谌博,李广军,李强. 采用LMS数字校准的13位200MSPS ADC设计[J]. 中国集成电路, 2011, 20(10): 52-55 |
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| 作者姓名： | 高俊枫 谌博 李广军 李强 |
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| 作者单位： | 电子科技大学通信与信息工程学院,四川成都,611731 |
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| 摘 要： | 本文设计了无采保电路流水线ADC,并且采用LMS校准技术对ADC前三级3阶和5阶非线性误差进行数字校准。精心设计的运放和开关使MDAC的闭环非线性仅为7LSB左右。仿真结果表示200MSPS采样率的流水线ADC在输入达到83.13M时可以达到77dB的SNDR。
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| 关 键 词： | 流水线ADC 数字校准 LMS 线性度 |
13-bit 200MSPS Pipeline ADC Analog Circuits Design with LMS Digital Calibration |
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| GAO Jun-feng,CHEN Bo,LI Guang-jun,LI Qiang. 13-bit 200MSPS Pipeline ADC Analog Circuits Design with LMS Digital Calibration[J]. China Integrated Circuit, 2011, 20(10): 52-55 |
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| Authors: | GAO Jun-feng CHEN Bo LI Guang-jun LI Qiang |
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| Affiliation: | GAO Jun-feng,CHEN Bo,LI Guang-jun,LI Qiang(School of Communication and Information Engineering,UESTC,Cheng du 611731,China) |
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| Abstract: | A SHA less pipeline ADC is designed by the paper,with the 3rd-order and 5th-order nonlinearity of the first three stages calibrated by LMS calibration technique.Around 7LSB closed-loop nonlinearity of MDAC is achieved by carefully consider the opamps and switches.Simulation shows the SNDR of the proposed ADC at 200MSPS sampling rate is 77dB with 83.13MHz input. |
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| Keywords: | pipeline ADC digital calibration LMS linearity |
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