Numerical simulation of electrical characteristics in nanoscale Si/GaAs MOSFETs |
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| Authors: | Yiming Li Wei-Hsin Chen |
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| Affiliation: | (1) Department of Communication Engineering, National Chiao Tung University, 1001 Ta-Hsueh Rd., Hsinchu, 300, Taiwan;(2) Department of Electrophysics, National Chiao Tung University, 1001 Ta-Hsueh Rd., Hsinchu, 300, Taiwan |
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| Abstract: | In this paper, electrical characteristics of metal-oxide-semiconductor field effect transistor (MOSFET) with silicon/gallium-arsenic (Si/GaAs) stacked film are numerically studied. By calculating several important device characteristics, such as the on-state current, the subthreshold swing, the drain induced barrier lowering, the threshold voltage, the threshold voltage roll-off, and the output resistance, a 50 nm Si/GaAs MOSFET is simulated with respect to different thicknesses of Si/GaAs film. Compared with the results of pure Si MOSFET, Si/GaAs MOSFET shows promising characteristics after properly selecting the thickness of Si/GaAs film. Among Si, germanium (Ge), and Si/Ge MOSFETs, Si/GaAs MOSFET relatively exhibits a higher driving capability due to higher carrier mobility within the Si/GaAs film. However, quantitatively accurate estimation of device characteristics will depend upon more precise calculation of band structure of the stacked film. |
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| Keywords: | Electrical characteristics Silicon Gallium-arsenic MOSFET Numerical simulation |
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