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Parallel Implementation of Self-Organizing Map on the Partial Tree Shape Neurocomputer
Authors:Kolinummi  Pasi  Pulkkinen  Pasi  Hämäläinen  Timo  Saarinen  Jukka
Affiliation:(1) Signal Processing Laboratory, Tampere University of Technology, Hermiankatu 12 C, FIN-33720 Tampere, Finland;(2) Signal Processing Laboratory, Tampere University of Technology, Hermiankatu 12 C, FIN-33720 Tampere, Finland;(3) Signal Processing Laboratory, Tampere University of Technology, Hermiankatu 12 C, FIN-33720 Tampere, Finland
Abstract:A parallel mapping of self-organizing map (SOM) algorithm is presented for a partial tree shape neurocomputer (PARNEU). PARNEU is a general purpose parallel neurocomputer that is designed for soft computing applications. Practical scalability and a reconfigurable partial tree network are the main architectural features. The presented neuron parallel mapping of SOM with on-line learning illustrates a parallel winner neuron search and a coordinate transfer that are performed in the partial tree network. Phase times are measured to analyse speedup and scalability of the mapping. The performance of the learning phase in SOM with a four processor PARNEU configuration is about 26 MCUPS and the recall phase performs 30 MCPS. Compared to other mappings done for general purpose neurocomputers, PARNEU's performance is very good.
Keywords:computer architecture  neurocomputer  parallel hardware implementation  parallel mapping  self-organizing map
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