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ITER prototype fast plant system controller
Authors:B. Gonçalves  J. Sousa  B.B. Carvalho  A.P. Rodrigues  M. Correia  A. Batista  J. Vega  M. Ruiz  J.M. López  R. Castro  A. Wallander  N. Utzel  P. Makijarvi  S. Simrock  A. Neto  D. Alves  D.F. Valcárcel  P. Lousã  F. Piedade  L. Fernandes
Affiliation:1. Instituto de Plasmas e Fusão Nuclear – Laboratório Associado, Instituto Superior Técnico, P-1049-001 Lisboa, Portugal;2. Centro de Investigaciones Energéticas, Medioambientales y Tecnológicas, CIEMAT, Av. Complutense, Madrid, Spain;3. Grupo de Investigación en Instrumentación y Acústica Aplicada, Universidad Politécnica de Madrid, Spain;4. ITER Organization, CS 90 046, 13067 St. Paul lez Durance Cedex, France;5. INOV, Lisbon, Portugal
Abstract:ITER CODAC Design identified the need for slow and fast control plant systems, based respectively on industrial automation technology with maximum sampling rates below 100 Hz, and on embedded technology with higher sampling rates and more stringent real-time requirements. The fast system is applicable to diagnostics and plant systems in closed-control loops whose cycle times are below 1 ms. Fast controllers will be dedicated industrial controllers with the ability to supervise other fast and/or slow controllers, interface to actuators and sensors and high performance networks (HPN).This contribution presents the engineering design of two prototypes of a fast plant system controller (FPSC), specialized for data acquisition, constrained by ITER technological choices. This prototyping activity contributes to the Plant Control Design Handbook (PCDH) effort of standardization, specifically regarding fast controller characteristics. The prototypes will be built using two different form factors, PXIe and ATCA, with the aim of comparing the implementations. The presented solution took into consideration channel density, synchronization, resolution, sampling rates and the needs for signal conditioning such as filtering and galvanic isolation. The integration of the two controllers in the standard CODAC environment is also presented and discussed. Both controllers contain an EPICS IOC providing the interface to the mini-CODAC which will be used for all testing activities. The alpha version of the FPSC is also presented.
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