A New CMOS Analog Front End for RFID Tags

This paper presents a new CMOS integrated analog front-end circuit for 13.56-MHz radio-frequency identification tags. The proposed analog front end consists of a novel CMOS rectified voltage multiplier, a voltage regulator, and a new frequency-shift keying (FSK) demodulator. The proposed single-stage rectifier employing only a PMOS/NMOS pass transistor, an inverter, and one capacitor gets minimal active area and enhances the power conversion efficiency. Moreover, a new technique is used in the proposed FSK demodulator, which includes the data recovery circuit, the multiplexer, the shift register, the phase frequency detector, and the charge-pump circuit. The analog front end has been fabricated in a CMOS 0.35-$muhbox{m}$ 2P4M technology. The demodulator circuit supports a data rate of 10 kb/s to 1 Mb/s. The power consumption is as low as 0.96 mW, and the chip area without pads is only 0.74 mm $times$ 0.43 mm. Experimental results show that the proposed analog front end works well and confirms the theoretical analysis.