| 一种无乘法高性能9/7离散小波变换滤波器的硬件设计 |
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| 引用本文： | 马艳萍,王剑峰,刘云.一种无乘法高性能9/7离散小波变换滤波器的硬件设计[J].电讯技术,2006,46(5):200-204. |
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| 作者姓名： | 马艳萍 王剑峰 刘云 |
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| 作者单位： | 鲁东大学,计算机科学与技术学院,山东,烟台,264025;青岛科技大学,信息与自动化学院,山东,青岛,266042 |
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| 摘 要： | 提出了一种基于提升格式，高效、实时实现JPEG2000中9／7双正交离散小波变换虑波器的VLSI结构设计方法。该方法所设计的结构，在保证同样的精度下，大大减少了运算量，整体运算速度高，硬件花费少，存储需求低，硬件利用率达到100％。用Verilog HDL对系统进行了硬件描述，并选用Xilinx公司的xcv50e-cs144-8器件在ISE4．1环境下实现了综合。
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| 关 键 词： | 离散小波变换 滤波器 JPEG000 提升格式 |
| 文章编号： | 1001-893X（2006）05-0200-05 |
| 收稿时间： | 2005-10-28 |
| 修稿时间： | 2005-10-282006-03-25 |
Hardware Design of a Multiplierless, High-Performance,9/7 DWT Filter |
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| MA Yan-ping,WANG Jian-feng,LIU Yun.Hardware Design of a Multiplierless, High-Performance,9/7 DWT Filter[J].Telecommunication Engineering,2006,46(5):200-204. |
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| Authors: | MA Yan-ping WANG Jian-feng LIU Yun |
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| Affiliation: | 1. School of Computer Science and Technology, Ludong University, Yantai 264025, China; 2. Institute of Information and Automation,Qingdao University of Science and Technology, 266042,China |
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| Abstract: | A high-efficient,real-time VLSI architecture is proposed that can perform 9/7 biorthogonal discrete wavelet transform(DWT) in JPEG2000.By using this architecture,the numbers of computing are reduced enormously with the same precision,the whole computation speed is high with less hardware cost and the memory requirement is low,and it can achieve 100% hardware utilization.The algorithm is simulated initially by Matlab,and then is described and simulated by Verilog HDL.It is synthesized by xcv50e-cs144-8 under Xilinx's ISE4.1. |
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| Keywords: | JPEG000 |
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