Proton-induced SEU in SiGe digital logic at cryogenic temperatures |
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Authors: | Akil. K. Sutton Kurt Moen John D. Cressler Martin A. Carts Paul W. Marshall Jonathan A. Pellish Vishwa Ramachandran Robert A. Reed Michael L. Alles Guofu Niu |
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Affiliation: | 1. School of Electrical and Computer Engineering, Georgia Institute of Technology, 777 Atlantic Drive, N.W., Atlanta, GA 30332, USA;2. Muniz Engineering, Houston, TX 77058, USA;3. Consultant to NASA-GSFC, Brookneal, VA 24528, USA;4. Department of Electrical Engineering and Computer Science, Vanderbilt University, Nashville, TN 37235, USA;5. Department of Electrical and Computer Engineering, Auburn University, AL 36849, USA |
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Abstract: | We present the first experimental results confirming the increased SEE sensitivity of SiGe digital bipolar logic circuits operating in a 63 MeV proton environment at cryogenic temperatures. A 3× increase in both the error-event and bit-error cross sections is observed as the circuits are cooled from 300 K to 77 K, with error signature analyses indicating corresponding increases in the average number of bits-in-error and error length over data rates ranging from 50 Mbit/s to 4 Gbit/s. Single-bit-errors dominate the proton-induced SEU response at both 300 K and 77 K, as opposed to the multiple-bit-errors seen in the heavy-ion SEU response. Temperature dependent substrate carrier lifetime measurements, when combined with calibrated 2 D DESSIS simulations, suggest that the increased transistor charge collection at low temperature is a mobility driven phenomenon. Circuit-level RHBD techniques are shown to be very efficient in mitigating the proton- induced SEU at both 300 K and 77 K over the data rates tested. These results suggest that the circuit operating temperature must be carefully considered during component qualification for SEE tolerance and indicate the need for broad-beam heavy-ion testing at low temperatures. |
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