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Impact of the gate stack on the electrical performances of 3D multi-channel MOSFET (MCFET) on SOI
Authors:Emilie Bernard  T. Ernst  B. Guillaumot  N. Vulliet  X. Garros  V. Maffini-Alvaro  P. Coronel  T. Skotnicki  S. Deleonibus
Affiliation:1. CEA-DRT-LETI – CEA-MINATEC/GRE, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France;2. ST Microelectronics, 850 rue Jean Monnet, 38926 Crolles Cedex, France;1. University of Twente, The Netherlands;2. Qimonda AG, Germany
Abstract:In this study, we integrate and compare the electrical performances of metal/high-K embedded gates in 3D multi-channel CMOSFETs (MCFETs) on SOI. The electrical characteristics of embedded gates obtained by filling cavities with TiN/HfO2, TiN/SiO2 or N+ poly-Si/SiO2 are compared to a planar reference. In particular, we investigate electron and hole mobility behaviours (300 K down to 20 K) in embedded and planar structures, the gate leakage current and the negative bias temperature instability (NBTI). Despite a lower mobility, TiN/HfO2 gate stack demonstrates the best ION/IOFF compromise and exhibits NBTI life time higher than 10 years up to 1.3 V.
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